Adventures in Micro Land

In this week’s Fish Fry, we’re following a microcontroller yellow brick road to a land where analog reigns supreme. Dave Smith (Texas Instruments) joins us to discuss the details of the “Smart Analog Combo” included in in the MSP430 family, the benefits of the configurable signal-chain elements inherent in this solution, and why the … Read More → "Adventures in Micro Land"

RISC-V Aims for World Domination

“One day you wake up and realize the world can be conquered…” – Austin Grossman

Dr. David Patterson, the newest recipient of the ACM’s A.M. Turing Award along with John Hennessy, launched into his opening remarks during his talk about the past, present, and future of processor and ISA (instruction set architecture) design at the annual dinner meeting of the < … Read More → "RISC-V Aims for World Domination"

When Your Own Technology Poisons You

“Good habits formed at youth make all the difference.” — Aristotle

It seemed like such a good idea at the time.

Car keys are going the way of the dinosaur. But, like dinosaurs, keys evolved over generations until they were perfectly adapted for their time, and it took an unearthly cataclysm to knock them off the top … Read More → "When Your Own Technology Poisons You"

Intel Acquires eASIC – Why?

Intel announced last week that they are acquiring structured ASIC company eASIC into their Programmable Systems Group (PSG). If you haven’t been following along in your major merger primer, Intel PSG was formerly known as Altera – one of the two major players in the FPGA market. Altera has played second fiddle to Xilinx in the Duopoly Symphony for the past twenty seasons or so. This … Read More → "Intel Acquires eASIC – Why?"

Long Live the (8 Bit) King

There are whispers that their time has come to fade away into the sunset. Time to drift away on the electronic wind with laser discs, Zune players, and VHS. But can the role of 8 bit MCUs in the electronic engineering ecosystem be dismissed so easily? Maybe not. In this week’s episode of Fish Fry, Nikos Zervas (CEO … Read More → "Long Live the (8 Bit) King"

July 20, 2018
July 19, 2018
July 18, 2018
July 17, 2018
July 16, 2018
July 13, 2018
July 12, 2018
July 10, 2018
July 9, 2018
discussion
Posted on Jul 19 at 3:14pm by graham@vhdl.co.nz
Interesting article, some good points made. There is clearly a growing interest in this subject from the likes of Xilinx, I've seen a number of papers and I see they have recently acquired DeepPhi.
Posted on Jul 18 at 10:37am by MikePDX
Of course, no exhaust danger if it's a pure electric car.
Posted on Jul 18 at 10:33am by MikePDX
My 2010 Toyota Prius has keyless entry and pushbutton start, and it's been fine. It does give you a couple seconds after locking before re-enabling the proximity detection, so you can pull the handle right after locking to see that it's locked. But a Ford Flex I rented in Denver let ...
Posted on Jul 17 at 2:28am by rudolffairbanks
No matter how suspicious it has seemed that Amazon is encouraging us to put listening devices in every room of our homes, the company has always said that its Echo assistants are not listening in on or recording conversations. Over and over again, company spokespeople have promised that they only ...
Posted on Jul 16 at 9:48am by Bryon Moyer
What do you think of Applied's tapping cobalt for interconnect?
Posted on Jul 16 at 5:41am by appleseed314
If the algorithm isn’t memory bound at all, then a highly pipelined superscalar high core count CPU/GPU implementation is likely to be as fast, or faster than an FPGA. While it's possible to be faster than an FPGA with high core count, it's probably not economical energy wise. ...
Posted on Jul 12 at 2:48pm by TotallyLost
We write algorithms based on the communications structure of the hardware it runs on. Most problems can be expressed with very different algorithms that are highly optimal for different highly parallel cpu, memory, and communications architectures. When single processor/memory systems are targeted, we tend to write monolithic algorithms and ...
Posted on Jul 11 at 1:18pm by ericverhulst
It all depends on the application. The key differentiator here might be the front-end. Design the application from the start as independent parallel processing "processes" (in essence, forget the global state machine) and the rest follows without headaches. Remember the transputer? It was based on the CSP process algebra. Even ...
Posted on Jul 11 at 11:51am by Jim Turley
What do you think? Are EDGE processors the wave of the future, or just another interesting science project for CPU nerds?
Posted on Jul 11 at 1:15am by TotallyLost
The primary bottleneck in CPU/GPU solutions is serialization from memory, even with large multi-level caches. If you can fit the algorithm in L1 cache, then it can go fast. Amdahl's law kicks in. The speedup that FPGA's provide, is that you can remove many of the serial memory accesses, ...
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featured blogs
Jul 20, 2018
As I said on Monday, I am in Japan this week for CDNLive. I haven't been in Japan for business since the year when I was CEO of Envis. Friday it's CDNLive Japan, held in the Yokohama Bay Hotel Tokyu. When I was told the hotel name, I'd never heard of it, but it...
Jul 16, 2018
Each instance of an Achronix Speedcore eFPGA in your ASIC or SoC design must be configured after the system powers up because Speedcore eFPGAs employ nonvolatile SRAM technology to store the eFPGA'€™s configuration bits. Each Speedcore instance contains its own FPGA configu...
Jul 12, 2018
A single failure of a machine due to heat can bring down an entire assembly line to halt. At the printed circuit board level, we designers need to provide the most robust solutions to keep the wheels...
chalk talks
MLCC Alternatives   The current shortage of multi-layer ceramic capacitors (MLCCs) is impacting a lot of project schedules. If you want to be sure your project isn’t hit by long MLCC lead times, and you’d like to improve a few things at the same time, there are some superb alternatives now on the market. In this … Read More → "MLCC Alternatives"
Maxim’s Himalaya uSLIC Solution: Industry’s Smallest Power Modules   New ultra-small power modules can deliver smaller solution size, higher reliability, and higher power density. In this episode of Chalk Talk, Amelia Dalton chats with John Woodward from Maxim Integrated about the industry’s smallest power modules. They might be exactly what you need for your next design. Click here for more information about … Read More → "Maxim’s Himalaya uSLIC Solution: Industry’s Smallest Power Modules"
Scaling Up Vision and AI DSP Performance  For high-performance, low-power processing of AI and machine vision algorithms, latency can be critical. In this episode of Chalk Talk, Amelia Dalton chats with Pulin Desai from Cadence Design Systems about the using the new Vision Q6 processor core for embedded vision and AI applications. Click here for more information about Vision DSPs for … Read More → "Scaling Up Vision and AI DSP Performance"
KSIM: Capacitors  Finding the right capacitor for your design can be a challenge. Many designers don’t take the time to research the best capacitor for their application, and this can result in increased cost, reduced performance, and reduced reliability. In this episode of Chalk Talk, Amelia Dalton chats with Wilmer Companioni of KEMET about KSIM – … Read More → "KSIM: Capacitors"
Designing 5G Wireless Technologies with MATLAB and Simulink  5G wireless infrastructure brings daunting design challenges. Fortunately, tools are available that can model and simulate some of the most complex aspects of 5G design. In this episode of Chalk Talk, Amelia Dalton chats with Ken Karnofsky of MathWorks about modeling and simulation for beamforming, RF power amplifier linearization, and much more. Click here … Read More → "Designing 5G Wireless Technologies with MATLAB and Simulink"
Synergy Platform Update IoT development demands a laundry list of specialized technologies and design decisions. It pays to have a development platform that can keep up with the rapidly changing landscape. In this episode of Chalk Talk, Amelia Dalton chats with Henrik Floodell from Renesas about how the latest version of the Synergy Platform can help keep … Read More → "Synergy Platform Update"