The Future is Verified

Looking Forward to DVCon 2017 with Dennis Brophy

by Amelia Dalton

Design verification is front and center in this week's episode of Fish Fry. Dennis Brophy, General Chair of DVCon, gives us a special sneak peek into the Design Verification Conference and Expo taking place next week in San Jose, California. Please join me as Dennis and I explore the variety of tutorials, keynotes, and sessions you will find at DVCon. We also discuss how to learn about advanced verification methodologies and techniques, how to apply formal methods to the art of verification, and how to achieve the next level of design verification productivity. Then, for something completely different, our Kickstarter Corner highlights a new campaign launched by a team at MIT Media Lab that transforms air pollutants into unique art supplies.  Read More


latest news

February 22, 2017

First Scalable Wi-Fi HaLow MAC from Methods2Business Built with Cadence Tensilica DSP

February 21, 2017

Accellera Day Opens DVCon U.S. on Monday, February 27 with Three Timely Tutorials

Synopsys IC Compiler II Sets the Bar in Quality-of-Results

Mentor Graphics Adds ReqTracer to Fast-Growing

Cadence Collaborates with CommSolid to Address the Cellular IoT Market with New NB-IoT Baseband IP

February 20, 2017

Fairview Microwave Debuts Gunn Diode Oscillator Operating at 24.125 GHz

February 16, 2017

Mentor Graphics Announces Veloce Strato Platform Scales Up to 15BG

February 15, 2017

Phoenix Contact Achieves Traceability Success with Mentor Graphics Valor IoT Manufacturing Solution

February 09, 2017

Handheld oscilloscope from Rohde & Schwarz now offers the functionality of eight test instruments

Kisters enhances 3DViewStation with revolutionary rendering performance and photo realistic rendering

February 08, 2017

DVCon U.S. 2017 – Don’t Miss It!

February 06, 2017

Optimized for debugging and testing complex high-end SoCs: PLS' UDE 4.8 simplifies trace analysis and the evaluation of runtime behavior of embedded systems

February 02, 2017

CodeMeter Embedded 2.0 to be Introduced at Embedded World 2017

Rambus Selects Synopsys' ARC EM Processors for Embedded Security Platform

February 01, 2017

Teledyne LeCroy Showcases World’s First SAS 4.0 (24 Gb/s) Live Demonstration at DesignCon 2017

EDA News Archive

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EDA Article Archive

 

Editors' Blog

Meet You in Brussels?

posted by Dick Selwood

the imec Technology Forum is in Brussels in May (20-Apr)

An Opening for MEMS PDKs

posted by Bryon Moyer

Coventor’s new MEMS+ 6.0 release enables efforts to start developing PDKs for popular kinds of MEMS sensors. (22-Oct)

We are doomed

posted by Dick Selwood

Forecasts for semiconductor sales are depressing (25-Sep)

Bashing Bugs on SoCs

posted by Dick Selwood

UltraSoC launches white paper (23-Sep)

Designing Irregular Light

posted by Bryon Moyer

Synopsys’s latest LightTools release makes it easier to create complex illumination. (15-Sep)

EDA Editors' Blog Archive

forum

Radio FPGA!

Posted on 02/23/17 at 12:48 AM by TotallyLost

TotallyLost
Thanks Kevin --- way cool parts --- can not wait for their general availability smiling

FPGAs Race for the Bottom

Posted on 02/20/17 at 4:42 PM by logos

CyrilJ,

You're links are broken.

Also, Microsemi's THREE separate software suites are INCONSISTENT with Linux support.
- FlashPro for Libero IDE does not support Linux. Microsemi's site and documentation is all over the place with FlashPro hardware…

How Does Scatter/Gather Work?

Posted on 02/20/17 at 2:13 PM by TotallyLost

TotallyLost
What is FAR worse?

An 8-way time division multiplexor to "fairly share" memory between 6 processors and 2 DMA channels -- no priority accesses to starve another channel, no contention based allocations, just straight channel 1 gets only time slot 1, ch…

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